TSB41LV06APZPG4

100-HTQFP, digital and analog transceiver, -0.3V to 4V, Ultra low Power Sleep Mode, link layer controller (LLC)

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Price:: US $6.80~9.00 / piece [Get Latest Price]

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	US $6.80~9.00

PartNumber:: TSB41LV06APZPG4

Brand:: Texas Instruments - TI | Pack: DIP | D/C: 10+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-12-09

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Part Number:TSB41LV06APZPG4
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Product Summary

The TSB41LV06APZPG4 provides the digital and analog transceiver functions needed to implement a six-port node in a cable-based IEEE 1394 network. Each cable port incorporates two differential line transceivers. The TSB41LV06APZPG4 transceiver includes circuitry to monitor the line conditions as needed for determining connection status, for initialization and arbitration, and for packet reception and transmission. The TSB41LV06APZPG4 is designed to interface with a link layer controller (LLC).

Parametrics

TSB41LV06APZPG4 absolute maximum ratings: (1)Supply voltage range, VCC: -0.3V to 4V; (2)Input voltage range, VI: -0.5V to VCC+0.5V; (3)5V tolerant I/O supply voltage range, VDD_5V: -0.3V to 5.5V; (4)5V tolerant input voltage range, VI_5V: -0.5V to VDD_5V+0.5V; (5)Output voltage range at any output, VO: -0.5V to VDD+0.5V; (6)Electrostatic discharge, HBM: 2 kV, MM: 200 V; (7)Operating free air temperature,TA: 0℃ to 70℃; (8)Storage temperature range, Tstg: -65℃ to 150℃; (9)Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: 260℃.

Features

TSB41LV06APZPG4 features: (1)Ultralow-Power Sleep Mode; (2)Node Power Class Information Signaling for System Power Management; (3)Cable Power Presence Monitoring; (4)Cable Ports Monitor Line Conditions for Active Connection to Remote Node; (5)Data Interface to Link-Layer Controller Through 2/4/8 Parallel Lines at 49.152 MHz; (6)Interface to Link Layer Controller Supports; (7)Interoperable With Link-Layer Controllers; (8)Interoperable With Other Physical Layers; (9)Incoming Data Resynchronized to Local Clock; (10)Logic Performs System Initialization and Arbitration Functions; (11)Encode and Decode Functions Included for Data-Strobe Bit Level Encoding; (12)Separate Cable Bias (TPBIAS) for Each Port; (13)Single 3.3-V Supply Operation; (14)Low Cost High Performance 100-Pin TQFP; (15)Direct Drop-In Upgrade for TSB41LV06PZP.